1. Field of the Invention
The present invention relates to a method for manufacturing capacitor on a semiconductor wafer, and more particularly, to a method for manufacturing and increasing the storage node of a capacitor on a semiconductor wafer
2. Description of the Prior Art
Capacitor is an important component of a dynamic random access memory (DRAM) for storing data. If a capacitor of a DRAM can store more charges, then a sense amplifier will be less affected when retrieving data so that mistakes such as soft errors can be minimized. In the same time, frequency of recharging can also be reduced. Currently there are two approaches in increasing the storage capacity of a capacitor. The first method uses a dielectric material with a higher dielectric constant to deposit between a storage node and a field plate of a capacitor. In the second method, the surface area of a capacitor especially the surface area of the storage node and the field plate is enlarged so as to increase the total number of charges stored in the capacitor. Currently, most capacitor dielectric layers are made of the composite structure ONO (oxide/nitride/oxide) . This material not only reduces the thickness of a single capacitor cell but also provides a better dielectric constant with a higher number of the charges stored in the capacitor per unit area.
Please refer to FIG. 1 to FIG. 3. FIG. 1 to FIG. 3 are the sketching diagrams of a method for manufacturing a stacked capacitor cell (STC) of a DRAM according to the prior art. Every element needed by the STC is prepared first. As illustrated in FIG. 1, a symmetrical pair of field oxide layers 14 is formed on the silicon substrate 12 of the surface of a semiconductor wafer 10, then a dielectric layer 16 is deposited over the pair of field oxide layers 14. The dielectric layer 16 further comprises a symmetrical pair of doped polysilicon bit lines 18. A neutral silicate glass (NSG) layer 20 is then deposited over the dielectric layer for protection and isolation. Finally, a photo resistor layer 22 is coated over the NSG layer 20, followed by etching a circular hole 23 in the center of the photo resistor layer 22.
Secondly, as illustrated in FIG. 2, a well 24 is etched perpendicularly down through the surface of the semiconductor wafer 10 by an anisotropic etching method, the well 24 being used as a capacitor contact window of the storage node, then the photo resistor layer 22 is eliminated followed by uniformly depositing an SiO.sub.2 layer approximately 1000 .ANG. thick over the surface of the side wall of the well 24 by using chemical vapor deposition (CVD) and etch back methods. This allows better isolation protection between the storage node and the bit line 18. Through use of the etch back technique, the thickness of the NSG layer 20 reduces from 2300 .ANG. to about 1000 .ANG. by this time.
Next, as illustrated in FIG. 3, a polysilicon layer is again deposited over the well 24 using the CVD method with ionic phosphorus being doped in-situ simultaneously. This method creates a doped polysilicon layer of uniform thickness over the well 24 and NSG layer 20. Then by using photolithography and etch methods the unwanted part of the doped polysilicon layer is removed to form a mushroom-shaped storage node 28. Aternatively, with the creation of the doped polysilicon layer, ionic dopants such as phosphorus may be introduced into the polysilicon layer by ion implantation.
Finally an ONO dielectric layer is deposited and formed on the single cell and field plate and a nitride layer about 5 nm thick is deposited directly on the surface of the storage node 28 by the CVD method, then an oxide layer about 2 nm thick is formed on the surface of the nitride layer by passing vapor at 920.degree. C. through to reoxidize it. Thus by adding to the native oxide layer on the polysilicon surface of the storage node 28, an ONO composite dielectric layer 30 of the single cell is formed. CVD is then used to deposit a polysilicon layer again with the field plate 32 completing the production of a typical stacked capacitor cell (STC).